Summary

For the final project of our ENGPHYS 2E04 course, we were tasked to create a sequential logic circuit which would cycle through our student number on a 7-segment display. The number used in this project is 400409275, and the physical circuit was created by myself and my lab partner. The report and demonstration video are shown below, a grade of 100% was achieved for this project.

Skills

• Digital and Sequential Logic Design
• Wiring and Troubleshooting
• NI Multisim Circuit Design
• Documentation and Report Writing

Design Process

1. Design a state transition diagram with the states required to be shown on the 7-segment display. These states would be all nine digits of the student number in 4-bit binary as well as any counter bits.
2. Since J-K flip flops will be used, create Karnaugh Mapping tables for each J and K input of every flip flop chip. Use these tables to devise Boolean expressions for every input.
3. Implement the Boolean expressions as logic gates in a circuit solver tool such as Multisim. Verify the timing diagram of the circuit and the virtual 7SD to determine if the intended logic is achieved.
4. Recreate the Multisim circuit on a physical breadboard using the given components. Verify its correctness using the physical 7SDs.

Notable Components Used

• J-K Flip Flop Chips
• NOR Gates
• AND Gates
• OR Gates
• Function Generator (as a System Clock)
• Oscilloscope
• DC Power Supply
• 7-Segment Display
• 7SD Driver Chip

Project Report

This report highlights the analytical design and simulation portions of this project.

This report highlights the analytical design and simulation portions of this project.

Video Demonstration

The video demonstration verifies the implementation of the simulation and physical build.

The video demonstration verifies the implementation of the simulation and physical build.